Our FPGA design methodology encompasses a simulation and verification based approach. We integrate our RTL designs with bus functional models, embedded processor models and test suites to provide a comprehensive system test environment, and we routinely build system models integrating our FPGA designs with surrounding system components including software simulators and transactors.

• Hard / Soft core embedded processor subsystems
• Custom processor accelerators
• Peripheral core development and integration
• Multi-processor integration and communication
• Linux implementations for embedded and control plane environments
• Flexible prototyping, control plane, data-path assist, diagnostics, statistics applications

Project Development Process
¤ Optimize time-to-market, cost and quality pressures

Documentation Process
¤ Provide detailed FPGA, board and system specifications
¤ Extensive RTL comments in complex design areas

Design Process
¤ Architect system and FPGA designs to meet client’s design challenge
¤ RTL coding in a self-documenting, clear and intuitive style
¤ Support software and system integration teams with built-in diagnostic, analysis and system visibility tools

Implementation Process
¤ Leveraging and integrating IP cores
¤ Structured approach using best-in-class tools
¤ Structured constraints methodology
¤ Physical synthesis to amplify design

Verification Processs
¤ Complete in-system RTL simulations
¤ Regression testing and test bench coverage
¤ Built-in Integrated Logic Analysis

Customer Support
¤ Expert team support during system integration
¤ Comprehensive design review and support to ensure a complete design transfer
¤ Built-in Integrated Logic Analysis